This application claims the priority of Korean Patent Application No. 2003-78105, filed on Nov. 5, 2003, in the Korean Intellectual Property Office, the contents of which are incorporated herein in their entirety by reference.
1. Field of the Invention
The present invention relates to a local area network (hereinafter referred to as “LAN”), and more particularly, to a method of compensating for energy loss and eliminating inter-symbol interference and inter-chip interference, and a rake receiver for a wireless LAN adopting the method.
2. Description of the Related Art
Wireless local area networks (WLANs) defined in IEEE 802.11.B/G standard wirelessly connect private or public LANs to offer ease of information transmission to users who utilize such devices as computers and mobile communications terminals. The IEEE 802.11.B/G standard also defines complementary code keying (CCK) signals.
Generally, CCK signals are transmitted in the 2.4 GHz band at a maximum transmission speed of 11 Mbps. When signals are transmitted through wireless channel environments, the transmitted signals experience multi-path fading. The multi-path fading causes interference between the signals, which, in turn, causes transmission errors, thereby degrading system performance. Therefore, a rake receiver or equalization techniques must be used to compensate for the distortion of and interference between the signals generated through multiple paths, and energy loss.
General transmission techniques of WLAN signals such as CCK signals are disclosed in U.S. Pat. No. 6,256,508 and U.S. Patent Publication No. 2002/0159422. In the IEEE802.11.B/G standard, a CCK symbol transmitted using a quadrature phase shift keying (QPSK) modulation is composed of eight chips. A plurality of the CCK symbols constitute a CCK symbol stream and each of the CCK symbols may be composed of a different number of chips.
When a CCK symbol transmitted using the QPSK modulation is composed of 8 chips, CCK code indicating the CCK symbol may be expressed as in Equation 1. In Equation 1, C denotes an eight chip code, and a value of each of the chips is one of four values in Equation 3 according to Equations 1 and 2. In this regard, CCK signals transmitted through multiple paths experience inter symbol interference (ISI) and inter chip interference or intra-codeword chip interference (ICI).
                    C        =                              {                                          c                0                            ,                              c                2                            ,                              c                2                            ,                              c                3                            ,                              c                4                            ,                              c                5                            ,                              c                6                            ,                              c                7                                      }                    ⁢                                          ⁢                                          =                      {                                          ⅇ                                  j                                      (                                                                  φ                        1                                            +                                              φ                        2                                            +                                              φ                        3                                            +                                              φ                        4                                                              )                                                              ,                                                ⅇ                  j                                                  (                                                            φ                      1                                        +                                          φ                      3                                        +                                          φ                      4                                                        )                                            ,                              ⅇ                                  j                                      (                                                                  φ                        1                                            +                                              φ                        2                                            +                                              φ                        4                                                              )                                                              ,                              ⅇ                                  -                                      j                                          (                                                                        φ                          1                                                +                                                  φ                          4                                                                    )                                                                                  ,                                                ⅇ                  j                                                  (                                                            φ                      1                                        +                                          φ                      2                                        +                                          φ                      3                                                        )                                            ,                                                ⅇ                  j                                                  (                                                            φ                      1                                        +                                          φ                      3                                                        )                                            ,                                                ⅇ                                      -                    j                                                                    (                                                            φ                      1                                        +                                          φ                      2                                                        )                                            ,                                                e                  j                                                  (                                      φ                    1                                    )                                                      )                                              Equation        ⁢                                  ⁢        1            Φn∈{0,π/2,π,−π/2},(n=1,2,3,4)  Equation 2ck∈{1,j,−1,−j},(k=0,1,2, . . . ,7)  Equation 3
FIG. 1 illustrates an example of receiving transmitted signals delayed by reflectors. Referring to FIG. 1, signals transmitted from a transmitter 10 are reflected by reflectors 12 and 13. Unlike signals not reflected by the reflectors 12 and 13, the reflected signals are delayed by a predetermined period of time (T1 or T2) before being received by a receiver 11.
FIG. 2 illustrates ISI and ICI components of CCK symbols received through a multi-path channel as shown in FIG. 1. For example, using a second CCK codeword 20-2 as a reference, symbols 21 of the delayed signals belong to a first CCK codeword 20-1, but are received when the second CCK code word 20-2 of the signal that is not delayed is received, thereby causing ISI. Symbols 22 of the delayed signals belong to the second CCK code word 20-2, thus causing ICI in the second symbol 20-2.
FIG. 3 is a block diagram of a conventional rake receiver. Referring to FIG. 3, the conventional rake receiver includes a channel matched filter 31, a CCK correlator 32, and a CCK codeword determination unit 33. Reference numeral 34 indicates a channel impulse response, and reference numeral 35 indicates an impulse response of an output from the channel matched filter 31. The conventional rake receiver of FIG. 3 compensates for energy loss in the channel matched filter 31. However, it is not possible to eliminate ISI and ICI caused by a precursor 35-1 and a post cursor 35-2 of the output of the channel matched filter 31.
FIG. 4 is a block diagram of another conventional rake receiver having a decision feedback equalizer (DFE) structure for eliminating ISI. Referring to FIG. 4, the conventional rake receiver includes a channel matched filter 31, a CCK correlator 32, a CCK codeword determination unit 33, and an ISI detector 41. The ISI detector 41 detects an ISI component of a previous symbol using a CCK code obtained from the CCK codeword determination unit 33. Then, the detected ISI component is eliminated from an output signal of the channel matched filter 31. The rake receiver of FIG. 4 may eliminate an ISI component that affects a present symbol by using a demodulated CCK code. However, the rake receiver cannot eliminate ICI, that is, an interference component between chips.